Finally. Dr. Bower, also a defendants' witness, holds a bachelor of arts degree in physics from the University of California at Berkley. He also holds a master of science degree in electrical engineering and a doctorate in philosophy in applied physics from the California Institute of Technology. Dr. Bower is a professor in the electrical and computer engineering department of the University of California at Davis.
The parties interpret differently the meaning of four portions of each patent. The court will first address the legal requirements of claim construction. It will then address each significant dispute over the meaning of claim terms in turn.
Claim interpretation elaborates on an inventor's "normally terse language" in the patent claims, in order to understand and explain, but not to change, the scope of those claims. Scripps Clinic & Research Found. v. Genentech, Inc., 927 F.2d 1565, 1580 (Fed. Cir. 1991). A number of factors may help construe or interpret claim terms, including other words in the claim, other claims in the patent, the specification, the prosecution history, and expert testimony and other evidence outside the patent. SmithKline Diagnostics, Inc. v. Helena Labs. Corp., 859 F.2d 878, 882 (Fed. Cir. 1988).
As an independent lexicographer in authoring a patent, an inventor may freely define claim words. However, the specification or prosecution history must clearly explain any special definitions or usages in a claim. Markman, 52 F.3d at 980; Intellicall, Inc. v. Phonometrics, Inc., 952 F.2d 1384, 1388 (Fed. Cir. 1992). In other words, where the inventor does not clearly explain the adoption of an uncommon or new definition for a claim term, the common meaning of that term to one of ordinary skill in the art controls. Beachcombers v. Wildewood Creative Prods., Inc., 31 F.3d 1154, 1158 (Fed. Cir. 1994).
While other claims may supply insight into the scope of a claim, Fromson v. Advance Offset Plate, Inc., 720 F.2d 1565, 1570 (Fed. Cir. 1983), this court may not read narrow claim limitations into broad claims during either a validity or an infringement analysis. SRI Int'l v. Matsushita Elec. Corp. of Am., 775 F.2d 1107, 1122 (Fed. Cir. 1985). Examples set forth in the specification do not necessarily limit the scope of a claim. Transmatic, Inc. v. Gulton Indus., Inc., 53 F.3d 1270, 1277 (Fed. Cir. 1995).
A patent's prosecution history also influences the interpretation of claim language. Markman, 52 F.3d at 980; accord Graham v. John Deere Co., 383 U.S. 1, 33, 15 L. Ed. 2d 545, 86 S. Ct. 684 (1966); see Singer Mfg. Co. v. Cramer, 192 U.S. 265, 278-85, 48 L. Ed. 437, 24 S. Ct. 291 (1904). "Although the prosecution history can and should be used to understand the language used in the claims, it too cannot 'enlarge, diminish, or vary' the limitations in the claims." Markman, 52 F.3d at 980. Prosecution history generally operates to foreclose an interpretation disclaimed or disavowed during the process of acquiring a patent. Jonsson v. Stanley Works, 903 F.2d 812, 817 (Fed. Cir. 1990). Claim interpretation in view of the prosecution history is a preliminary step in determining literal infringement, while prosecution history estoppel limits application of the doctrine of equivalents after proper interpretation of the claims yields no finding of literal infringement. See Loctite Corp. v. Ultraseal Ltd., 781 F.2d 861, 870 (Fed. Cir. 1985).
Extrinsic evidence may demonstrate the state of the art at the time of the invention and thus assist the court in the construction of the patent claims. Markman, 52 F.3d at 980; Brown v. Piper, 91 U.S. 37, 41, 23 L. Ed. 200 (1875). The extrinsic evidence provides assistance to the court in understanding how someone skilled in the art at the time of the invention would understand the claims. Markman, 52 F.3d at 980-81.
The '674 Patent
A. How is Insulation Selectively Applied?
The parties interpret differently whether claim 1 of the '674 patent requires application of insulation only in certain places and not in other locations over the semiconductor substrate. Claim 1 reads, in relevant part, "selectively applying at least one layer of insulation material to said semiconductor substrate." The claim language does not specify locations or methods for application of insulation.
The term "insulation material" has its common meaning: material that does not conduct electricity. The term "selectively applying" has no common, well-understood meaning. Thus, this court sought expert testimony about its meaning to one of skill in this an at the time of invention.
Dr. Wen testified that one skilled in the art at the time of the invention would have understood this process step to encompass formation of one or more layers of a defined thickness of insulation at different points across the surface of the device. Transcript of September 19, 1995, hearing, at 224 (hereinafter referred to as "Transcript"). According to Dr. Wen, the thickness of insulation varies in different parts of the device. For example, the active part of the circuit, where the light sensing element resides, would have a relatively thin layer of insulation material. A thin layer at this location is necessary to facilitate sensitivity to light. However, Dr. Wen explained, the periphery of the device or field area would have a relatively thick layer of insulation. Transcript at 224-25.
Dr. Wen explained that at the time of the '674 patent those in the field knew several methods of applying different thicknesses of insulation at various locations on the device. For example, one application process would grow a relatively thick layer of insulation over the whole array. The manufacturer would then use a mask to define the active region of the circuit. After masking, a chemical etch would remove the thick oxide in these areas. Then, the manufacturer would grow a very thin layer of oxide in the active region. Thus, "selectively applying" as understood by those skilled in the art at the time of invention meant application of a thin layer of insulation over the active region leaving a relatively thick layer in the inactive region. Transcript at 225-26.
The specification also suggests the application of insulation material of various thicknesses according to the function of the underlying semiconductor layers. For instance, the specification discusses use of silicon nitride to prevent the formation of additional oxide on the insulation layers:
The second insulating layer 26 is silicon nitride because thermally grown oxides will not form on the nitride. Thus the silicon nitride is very useful in protecting the underlying layer 24 from becoming significantly thicker as would normally occur during the subsequent oxidation steps in the process of this invention.
The '674 patent, column 4, lines 31-37.
The specification further discusses the use of silicon nitride to slow oxide growth: "Moreover, since oxides grow much more slowly on a silicon nitride surface, no substantial oxide grows on the top surface of silicon nitride layer 26." Column 5, lines 16-18. As these passages indicate, insulation material grows in all areas even using the disclosed illustrative method. Thus, the specification does not suggest that the inventor intended to limit this process step to one technique or to a process that insulated certain areas and not others.
Consequently, this court concludes this language describes a process step during which one or more layers of insulation material of a defined thickness form at specific locations on the top surface of the silicon wafer.
B. Is Insulation Required Before Implantation?
The parties also dispute whether claim 1 of the '674 patent dictates a process sequence requiring formation of the insulation layer over the first gate electrodes before implantation of the barrier regions. The claim language states, in relevant part:
forming a first insulation layer over said plurality of first gate electrodes; forming implanted harrier regions in said semiconductor substrate in the intervals between said plurality of spaced-apart first gate electrodes, the edges of said implanted barrier regions being aligned with the vertical edges of the insulation layer on the respective first gate electrodes.