Daralyn J. Durie, Durie Tangri, LLP, of San Francisco, CA, argued for plaintiff-
appellee. With her on the brief was Eugene Novikov.
Roger L. Cook, Kilpatrick Townsend & Stockton, LLP, of San Francisco, CA, argued for defendant-appellant. With him on the brief were Robert D. Tadlock and Sara B. Giardina. Of counsel on the brief was Joshua H. Lee, of Atlanta, GA.
Before RADER, Chief Judge, LOURIE and O'MALLEY, Circuit Judges.
Concurring opinion filed by Chief Judge RADER.
O'MALLEY, Circuit Judge.
This appeal arises from the United States District Court for the Northern District of California. The district court granted summary judgment in favor of Sidense Corporation (" Sidense" ), holding that it did not infringe Kilopass Technology, Inc.'s (" Kilopass's" ) U.S. Patents 6,940,751 (" the '751 patent" ), 6,777,757, and 6,856,540. Kilopass Tech., Inc. v. Sidense Corp., No. 10-2066, 2012 WL 3545286 (N.D.Cal. Aug. 16, 2012). We summarily affirmed that decision under Federal Circuit Rule 36. Kilopass Tech., Inc. v. Sidense Corp., 501 Fed.Appx. 980 (Fed.Cir.2013). While that appeal was pending, Sidense filed a motion in the district court seeking an award of attorneys' fees under 35 U.S.C. § 285, which the district court denied. Kilopass Tech., Inc. v. Sidense Corp., No. 10-02066, 2012 WL 6599428 (N.D.Cal. Dec. 18, 2012). Sidense now appeals from the district court's denial of that motion. We vacate and remand for reconsideration consistent with this opinion.
Kilopass and Sidense are competitors in the embedded non-volatile memory (" NVM" ) market. Memory cells use transistors to store information. NVM memory consists of memory devices that retain their information (or state) when power is removed. Kilopass markets technology used to create its 1.5T NVM memory technology. Sidense has a competing 1T-Fuse product, the design and technology of which it licenses to its customers, who in turn use those designs to build embedded memory cells.
Kilopass's patents cover a memory cell comprised of transistors located at the cross-points of a column bitline and a row wordline. Each transistor has a " gate" connected to a column bitline and a " source" connected to a row wordline. '751 patent col. 5 ll. 32-40. Opposite the source is a " drain" that is not connected to any bitlines or wordlines. Id. Beneath the gate is a substrate separated from the gate by a dielectric oxide. Id. col. 7 l. 17. The dielectric oxide is engineered to " break down" when a sufficient voltage is applied to the gate. Id. col. 7 ll. 14-16. If the gate oxide breaks down, a conductive link forms between the source and drain, allowing current to flow through the transistor. Id. col. 7 ll. 16-20. The flow of current indicates that the transistor is in a programmed state, while the absence of current flow indicates that it is in a non-programmed state. Id.
Kilopass's '751 patent, which is representative of the patents in suit, is directed to a programmable memory cell utilizing a transistor at the intersection of a column bitline and a row wordline. '751 patent Abstract. Representative claim 1 reads as follows:
1. A programmable memory cell useful in a memory array having column bitlines and row wordlines, the memory cell comprising:
a transistor having a gate,
a gate dielectric between the gate and over a substrate,
and first and second doped semiconductor regions formed in said substrate adjacent said gate and in a spaced apart relationship to define a channel region there between and under said gate;
and wherein the second doped semiconductor region of the transistor is connected to one of said row wordlines,
and wherein said gate dielectric is formed such that the gate dielectric is more susceptible to breakdown near the first doped semiconductor region than said second doped semiconductor region.
Id. col. 14 ll. 30-44 (emphases added).
Claim 1 of the '751 patent requires a first and second doped semiconductor region of the memory cell where the second doped region is connected to one of the wordlines. Id. Sidense's 1T-Fuse cells, however, utilize a shallow trench isolation (" STI" ) region for the transistor drain instead of a first doped region. Kilopass, 2012 WL 3545286, at *10; J.A. 10604. The claim also requires the second doped region to be connected to a row wordline, but Sidense's 1T-Fuse product connects the second doped region to the column bitline. Kilopass, 2012 WL 3545286, at *7; J.A. 10604-05. These differences formed the basis of the district court's noninfringement determination, which we affirmed. Kilopass, 2012 WL 3545286, at *7-11, aff'd, 501 Fed.Appx. 980 (Fed.Cir.2013).
In 2005, Kilopass's founder and an inventor on all three of Kilopass's patents, Jack Peng, reviewed an international patent application submitted by Sidense that was directed to protecting Sidense's competing 1T-Fuse memory cell. Peng believed that the 1T-Fuse was similar to Kilopass's patented cells, except that Sidense used a split gate implementation. Kilopass, 2012 WL 3545286, at *9. Peng contacted a patent attorney at the law firm Perkins Coie to discuss potential infringement. In an email to the Perkins attorney, Peng explained that " [Kilopass] did not file [a] dedicated patent for this split gate implementation" and that " we should [have] ... a long time ago even though we were very busy." J.A. 10576, 10580. According to Peng, it was not a priority to Kilopass at that time because Sidense's " split gate [memory cell] is not self-aligned, so their practical cell size will be larger than [Kilopass's] 1.5T cell." J.A. 10576.
The Perkins counsel nonetheless believed that there was a sufficient basis to challenge Sidense with infringement contentions " in a friendly way ... to see what their reaction is." J.A. 10578. On November 28, 2005, the Perkins counsel sent a letter to Sidense advising that it " should be interested in obtaining a license to Kilopass's patents" or otherwise " provide [Kilopass] with an explanation of how these products avoid the claims" of the patents-in-suit, inter alia. J.A. 10583-86.
Sidense responded on January 20, 2006, stating, " [I]t is our opinion that no products produced by Sidense, nor their methods of operation, fall within the scope of the claims." J.A. 10590. Specifically, Sidense noted:
[E]ach [claim] require[s] that the transistor have (1) first and second doped semiconductor regions formed in the substrate adjacent the gate; and (2) a second doped semiconductor region connected to the row wordline .... Such elements are not present in Sidense's memory cell transistors. For at least these reasons, ... we do not believe any license of these patents is necessary.
J.A. 10590 (emphases added). Sidense also proposed that it was " prepared to consider a third-party examination, on a confidential basis" to confirm whether Sidense's products infringed, " provided [Kilopass] agreed to pay the costs of same
and to be bound by any findings in this regard." J.A. 10593.
After reviewing Sidense's response, the Perkins counsel sent the following e-mail to Peng and Kilopass's CEO:
Here is my report on Sidense's response to our charge of infringement. I still believe given our knowledge of Sidense's technology, that they infringe our patents. Please keep in mind that I am assuming that their memory design is the same as detailed in their patent application.... Note that it is possible that Sidense may have changed their memory design to be different from what is shown.... In speaking with Jack [Peng] earlier today, we speculated that Sidense may have eliminated the first doped region and replaced it with a shallow trench isolation [STI] of some sort.... [I]f in fact they have eliminated the first dope region, then they would NOT infringe our claims literally. If that is the case, then we would have to go through a " reissue" proceeding in the patent office that may take 2 years in order to modify our claims to include the situation where there is no first doped region.... The most crucial bit of information we need to find out is the design of their memory cell. We have been ... assuming that their patent application shows their memory cell. This is not always the case and it would be good if we could find out definitively how their memory cell is constructed. I still feel strongly about our case if they are using the memory cell described in their patent application.
J.A. 10601 (emphasis in original). That e-mail made clear that: (1) the analysis by Perkins counsel up to that point had been based on the assumption that the design of Sidense's 1T-Fuse cell was the same as the cell described in Sidense's international patent application; and (2) if that assumption was incorrect and Sidense had in fact replaced the first doped region ( i.e., the drain) with an STI region, then Sidense " would NOT infringe [the] claims literally." Id.
In June 2007, a Kilopass employee obtained a diagram of Sidense's 1T-Fuse cell at a presentation, which confirmed that Sidense had replaced the drain with an STI. The Perkins counsel then sent the following e-mail to Kilopass officials: " My preliminary review of all the Sidense materials indicates that they have redesigned their memory cell to avoid infringement of our patents. Or at least make our case much tougher. " J.A. 10604 (emphasis added). Counsel also noted that Sidense employed an opposite wordline and bitline configuration, viz., the gate of each transistor was connected to a row wordline and the source was connected to a column bitline. Counsel stated that he was " not so worried about the interchange of the bit line and word line," but that he was " more worried about the fact that [Sidense's cell] uses an [STI] on one side of the gate and not a [drain]." Id. at 10604-05.
Despite that advice from its Perkins patent counsel that Sidense did " NOT infringe [the] claims literally," and that Kilopass's case was " much tougher," Kilopass retained the law firm of Morrison Foerster (" MoFo" ) to conduct another analysis. On March 19, 2008, counsel from MoFo e-mailed Kilopass's CEO the following:
As we mentioned during the meeting, assuming Sidense's NVM product uses ... [an] STI region[ ] (as opposed to two N regions) to define the channel below the gate ... Kilopass appears to have a valid claim that Sidense's NVM product is at least " equivalent" to the invention claimed by claim 1 of Kilopass's ' 751 patent, and therefore that Sidense infringes that patent.
As we also discussed, the next step is for us to conduct a more detailed investigation and analysis to confirm our initial
impressions, which you asked us to complete before your April 2nd meeting ...