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Nazomi Communications, Inc. v. Nokia Corp.

United States Court of Appeals, Federal Circuit

January 10, 2014

NOKIA CORPORATION and Nokia Inc., Defendants, and Amazon.Com, Inc., Defendant, and Western Digital Corporation and Western Digital Technologies, Inc., Defendants-Appellees, and Sling Media, Inc., Defendant-Appellee, and Vizio, Inc., Defendant.

William D. Belanger, Pepper Hamilton LLP, of Boston, MA, argued for plaintiff-

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appellant. With him on the brief were Alison L. McCarthy, Frank D. Liu, and Benjamin M. Snitkoff.

Kevin P. Anderson, Wiley Rein, LLP, of Washington, DC, argued for defendants-appellees Western Digital Corporation, et al. and Deanne E. Maynard, Morrison & Foerster, LLP, of Washington, DC, argued for defendant-appellee Sling Media, Inc. With them on the brief were Karin A. Hessler and Robert J. Scheffel, Wiley Rein LLP, of Washington, DC, for Western Digital Corporation, et al.; and Brian R. Matsui, Morrison & Foerster, LLP, of Washington, DC; and Rachel Krevans, Scott C. Moore, and Ester Kim, of San Francisco, CA, for Sling Media, Inc.

Before LOURIE, DYK, and WALLACH, Circuit Judges.

DYK, Circuit Judge.

Plaintiff Nazomi Communications, Inc. (" Nazomi" ) appeals from a decision of the United States District Court for the Northern District of California construing disputed claim language and granting summary judgment of non-infringement in favor of defendants Western Digital Corporation and Western Digital Technologies, Inc. (collectively, " Western" ), and Sling Media, Inc. (" Sling" ). We affirm.


To function, a computing device requires both hardware and software. Processors are hardware components embedded in computing devices. The central processing unit (" CPU" ) enables a computing device to carry out instructions contained in a computer program. Software refers to instructions that tell the device hardware what to do. The hardware then follows these instructions (" executes" the software).

For a software program to run on the CPU of a computing device, the program must be compiled or translated from a high-level programming language that is written in a human-readable syntax (" source code" ), into a machine-readable form (" machine code" ) that the processor can understand. Machine code is processor-specific. As a result, particular compilers can only translate programs into machine code for particular types of processors. For example, Intel-based processors use one set of native instructions, Macintosh PowerPC-based processors use a different set of native instructions, and ARM Limited processors use another still. Therefore, to run the same source code or software on a different system or platform, it must be recompiled for the new system.

Java is a high-level programming language that addresses this problem by allowing developers to write programs that can run on different processors without being recompiled for each new system. Instead, the Java language uses a single compiler that translates Java programs into " bytecodes" instead of processor-specific machine code. Java bytecodes do not run directly on the CPU, but on a Java Virtual Machine (" JVM" ) which translates them into processor-specific machine code. Therefore, programs written in Java can run on any platform and any operating system, providing one of the principal advantages of Java programs— their " portability."

Computing devices also vary in how they store data in memory, which affects the characteristics of the machine code. Processors using stack-based memory systems " store information on a last-in, first-out basis ..., analogous to a stack of papers in an inbox." JA 2709. Therefore, " [t]o access a paper at the bottom of the stack, the reader must remove all of the papers above it." JA 2709. In contrast, register-

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based memory " stores and retrieves data according to the exact location of each data item, much like an arrangement of post office boxes." JA 2709. As a result, processors that use different memory storage systems must also use different types of machine code or " instruction sets," namely, " stack-based" instructions and " register-based" instructions. Although most modern processors use a register-based approach, Java bytecodes are stack-based instructions.

Therefore, a device using a register-based processor can run programs written in Java using a JVM that translates the stack-based Java bytecodes into register-based instructions. But executing Java bytecodes using a typical software-based JVM takes longer than executing programs that can run directly on the device's hardware without translation. One solution to this problem is processing certain Java bytecodes in hardware where the appropriate software is present to " accelerate" the execution of Java programs. However, such hardware-based JVMs may be unable to process legacy applications that are not programmed in Java.

Nazomi's two patents asserted here aim to address this issue. They describe a hardware-based JVM capable of processing stack-based instructions, that also retains the ability to run legacy ( i.e., register-based) applications without utilizing the JVM. At issue are four apparatus claims from two related patents, independent claims 48 and 74 of U.S. Patent No. 7,080,362 (" the '362 patent" ) and independent claims 1 and 5 of U.S. Patent No. 7,225,436 (" the ' 436 patent" ). Representative claim 48 of the '362 patent reads:

48. A central processing unit (CPU) capable of executing a plurality of instruction sets comprising:
an execution unit and associated register file, the execution unit to execute instructions of a plurality of instruction sets, including a stack-based and a register-based instruction set;
a mechanism to maintain at least some data for the plurality of instruction sets in the register file, including maintaining an operand stack for the stack-based instructions in the register file and an indication of a depth of the operand stack;
a stack control mechanism that includes at least one of an overflow and underflow mechanism, wherein at least some of the operands are moved between the register file and memory; and
a mechanism to generate an exception in respect of selected stack-based instructions.

'362 patent col. 10 l. 57 to col. 11 l. 6.[1]

a decoding mechanism [for a plurality of instruction sets, including stack-based and register-based];
a register file [including an operand stack to store operands for the stack-based instruction set and data associated with the register for register-based instruction set];
at least one of an overflow and underflow mechanism to cause the operands to— be moved between the ...

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